Using an array to report monitor stats instead of hard coded variable
names would allow for cleaner implementations of some cache hwmon
device drivers.
Change-Id: I787bdc12f10a0c8ff3c4195ce229a2987acdfce7
Signed-off-by: Junjie Wu <junjiew@codeaurora.org>
The cache monitoring devices might have more than one IRQ to handle
or might have notifications from other drivers instead of using actual
IRQs. So, refactor the governor to move the IRQ handling to the cache
monitoring device specific drivers and just provide an API that can be
used to request a re-evaluation.
The device specific driver can call this API to request an immediate
re-evaluation whenever the cache request has exceeded the previously
set limit instead of waiting for the periodic update.
Change-Id: Ib2e9f53f95749d659f440739a1b074b5a0d94fd8
Signed-off-by: Junjie Wu <junjiew@codeaurora.org>
The refactor allows the governor to support multiple devfreq devices.
This is done by having different HW monitor instances register their
capability to monitor different devfreq devices and then picking the
right HW monitor based on which devfreq device is using this governor.
Change-Id: I72c0542ce97f3965e422df521e0ce86cad218d93
Signed-off-by: Junjie Wu <junjiew@codeaurora.org>
The cache HW monitor devfreq governor uses the hardware counters to
determine the load on the cache and the appropriate frequency needed to
support that load. This governor can be used in conjunction with the cache
devfreq device to dynamically scale the cache frequency based on the
demand/actual usage from the CPU subsystem.
The governor is written to be agnostic of the actual counters used to
determine the load. On Krait based CPUs, the governor uses the Krait L2 PM
counters which can conflict with certain profiling tools.
The Krait L2 performance monitor counters have the capability to count
different types of requests going to the L2 cache. They also have the
capability to raise interrupts when they overflow. This driver uses those
counters to determine the true usage of L2 from the Krait processor
subsystem and then recommends L2 frequency based on the measured values and
the following tunable parameters.
The driver provides various tunables that allow it to be tuned more in
favor of power or performance:
- cycles_per_high_req: The no. of cache clock cycles that are necessary to
efficiently process a high-work request to the cache. A higher value
means higher power and potentially higher performance. A lower value
means lower power and potentially lower performance.
- cycles_per_med_req: The no. of cache clock cycles that are necessary to
efficiently process a medium-work request to the cache. A higher value
means higher power and potentially higher performance. A lower value
means lower power and potentially lower performance.
- polling_ms: The sampling period in milliseconds. This only affects the
sampling period when cache use is ramping down or is increasing very
slowly (See tolerance_mrps).
- min_busy: The minimum percentage of time the cache should be busy. This
is also applied as a lower bound to the measured busy percentage before
it's used in calculations. This has to be lower than or equal to
max_busy. Lower values will make the scaling more aggressive.
- max_busy: The maximum percentage of time the cache should be busy. This
is also applied as an upper bound to the measured busy percentage before
it's used in calculations. This has to be greater than or equal to
min_busy. Lower values will make the scaling more aggressive.
- tolerance_mrps: The minimum increase (in millions of requests per second)
in cache requests, compared to previous sample, that will trigger an IRQ
to immediately re-evaluate the cache frequency.
- decay_rate: The parameter controls the rate at which the history is
forgotten when ramping down. This is expressed as a percentage of history
to be forgotten. So 100% means ignore history, 0% means never forget the
historical max. The default 90% means forget 90% of history each time.
- guard_band_mhz: This is a margin that's added to the computed cache
frequency to account for the time it takes between the load increasing
and the governor/device finishes ramping up the cache frequency.
Change-Id: I918ae178cd3c9d14cb7714d7eb312cbbbb0d977b
Signed-off-by: Saravana Kannan <skannan@codeaurora.org>
Junjie Wu