android_kernel_lge_bullhead/arch/x86/kvm
Haozhong Zhang 49218ad121 KVM: nVMX: fix guest CR4 loading when emulating L2 to L1 exit
commit 8eb3f87d903168bdbd1222776a6b1e281f50513e upstream.

When KVM emulates an exit from L2 to L1, it loads L1 CR4 into the
guest CR4. Before this CR4 loading, the guest CR4 refers to L2
CR4. Because these two CR4's are in different levels of guest, we
should vmx_set_cr4() rather than kvm_set_cr4() here. The latter, which
is used to handle guest writes to its CR4, checks the guest change to
CR4 and may fail if the change is invalid.

The failure may cause trouble. Consider we start
  a L1 guest with non-zero L1 PCID in use,
     (i.e. L1 CR4.PCIDE == 1 && L1 CR3.PCID != 0)
and
  a L2 guest with L2 PCID disabled,
     (i.e. L2 CR4.PCIDE == 0)
and following events may happen:

1. If kvm_set_cr4() is used in load_vmcs12_host_state() to load L1 CR4
   into guest CR4 (in VMCS01) for L2 to L1 exit, it will fail because
   of PCID check. As a result, the guest CR4 recorded in L0 KVM (i.e.
   vcpu->arch.cr4) is left to the value of L2 CR4.

2. Later, if L1 attempts to change its CR4, e.g., clearing VMXE bit,
   kvm_set_cr4() in L0 KVM will think L1 also wants to enable PCID,
   because the wrong L2 CR4 is used by L0 KVM as L1 CR4. As L1
   CR3.PCID != 0, L0 KVM will inject GP to L1 guest.

Fixes: 4704d0befb ("KVM: nVMX: Exiting from L2 to L1")
Cc: qemu-stable@nongnu.org
Signed-off-by: Haozhong Zhang <haozhong.zhang@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Signed-off-by: Willy Tarreau <w@1wt.eu>
2017-11-02 10:46:03 +01:00
..
Kconfig kvm: Allow build-time configuration of KVM device assignment 2013-04-28 12:58:56 +03:00
Makefile kvm: Allow build-time configuration of KVM device assignment 2013-04-28 12:58:56 +03:00
cpuid.c KVM: x86: Make register state after reset conform to specification 2012-12-05 18:00:07 +02:00
cpuid.h Merge tag 'kvm-3.8-1' of git://git.kernel.org/pub/scm/virt/kvm/kvm 2012-12-13 15:31:08 -08:00
emulate.c KVM: x86: Introduce segmented_write_std 2017-06-08 00:46:47 +02:00
i8254.c KVM: i8254: change PIT discard tick policy 2016-06-07 10:42:44 +02:00
i8254.h KVM: fold kvm_pit_timer into kvm_kpit_state 2012-08-01 00:21:07 -03:00
i8259.c KVM: inject ExtINT interrupt before APIC interrupts 2012-12-13 23:05:21 -02:00
irq.c KVM: nVMX: fix "acknowledge interrupt on exit" when APICv is in use 2014-09-05 16:28:35 -07:00
irq.h KVM: switch to symbolic name for irq_states size 2012-07-20 16:12:16 -03:00
kvm_cache_regs.h KVM: MMU: Do not unconditionally read PDPTE from guest memory 2011-09-25 19:18:01 +03:00
lapic.c KVM: x86: make vapics_in_nmi_mode atomic 2015-07-10 10:40:22 -07:00
lapic.h kvm: x86: fix kvm_apic_has_events to check for NULL pointer 2015-08-16 20:51:43 -07:00
mmu.c KVM: MMU: fix CR4.SMEP=1, CR0.WP=0 with shadow pages 2015-06-05 23:19:54 -07:00
mmu.h KVM: MMU: Rename kvm_mmu_free_some_pages() to make_mmu_pages_available() 2013-03-21 19:45:01 -03:00
mmu_audit.c KVM: do not release the error pfn 2012-08-06 16:04:57 +03:00
mmutrace.h KVM: mmu: remove unused trace event 2013-01-07 19:54:50 -02:00
paging_tmpl.h KVM: x86: handle invalid root_hpa everywhere 2014-03-31 09:58:14 -07:00
pmu.c pmu: prepare for migration support 2013-04-02 17:42:44 +03:00
svm.c Use WARN_ON_ONCE for missing X86_FEATURE_NRIPS 2015-10-22 14:37:49 -07:00
trace.h KVM: x86: require matched TSC offsets for master clock 2012-11-27 23:29:15 -02:00
tss.h KVM: x86: hardware task switching support 2008-04-27 12:00:39 +03:00
vmx.c KVM: nVMX: fix guest CR4 loading when emulating L2 to L1 exit 2017-11-02 10:46:03 +01:00
x86.c KVM: x86: zero base3 of unusable segments 2017-11-02 07:16:29 +01:00
x86.h kvm: x86: fix stale mmio cache bug 2014-10-30 09:35:09 -07:00