Add the DT entry for the dummy cpu clocks. Also modify the cpu
clock list as per the updated clock diagram.
Change-Id: I45f62b780ab6b9a47af1e4084c41af3873936380
Signed-off-by: Pushkar Joshi <pushkarj@codeaurora.org>
gcc_usb3_phy_pipe_clk's source could be dynamically gated off at any
time. Thus checking branch_clk status bit could result in stuck on/off
warnings. Since the HW design can handle clock input glitch, model
gcc_usb3_phy_pipe_clk as gate clock instead of branch_clk.
Also add gcc_usb3phy_phy_reset for asserting reset bit previously
associated to gcc_usb3_phy_pipe_clk branch.
Change-Id: Id26c4c69af8b8b66f83fd6e160e4080494f25191
Signed-off-by: Junjie Wu <junjiew@codeaurora.org>
A7 subsystem contains a cpu clock PLL and a cpu clock.
Add their data in device tree to define these clocks.
Also, add a A7 measurement clock to allow measuring
the A7 cpu clock.
Change-Id: Ie991abc7fde5ada22eb9cc39fdaa39ed41bf5a37
Signed-off-by: Tianyi Gou <tgou@codeaurora.org>
Add clocks definition for MSM ZIRC to allow the clock
driver to control them.
Change-Id: I5692b1b68efb730db7f5019ce865e32d715f0933
Signed-off-by: Tianyi Gou <tgou@codeaurora.org>
The MSM8994 V2 CPU clock tree sports a new divider
configuration and also supports higher frequencies
compared to V1. Add the necessary clock structures
and code to support the new clock tree.
Change-Id: Ie424ac0621afea7a7994de51de80432c733322f6
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
Add support for the GCC clock controller for MSM8992
Change-Id: Ia409af8747e9d701a2dbdd0e5021380550277864
Signed-off-by: Pushkar Joshi <pushkarj@codeaurora.org>
Some debug mux parents might not be ready until the clock driver
providing it becomes ready. Use orphan list support to handle external
debug clocks, instead of failing the probe of clock_debug controller.
In addition, move external debug clock registration from
clock-gcc-8994 to clock-debug-8994.
Change-Id: I764d1fd3cab1af878bd567e30e02d62143204711
Signed-off-by: Junjie Wu <junjiew@codeaurora.org>
Rename all device tree files and usages of msmferrum
to its official name msm8909.
Change-Id: Ie17e62046ed8b9626a59e393076a3ff00934c0fe
Signed-off-by: Kishan Kumar <kishank@codeaurora.org>
Support A7PLL cpu clock and the frequencies supported. Add support to
measure frequencies of each of the sync cpu clocks.
Change-Id: Ib5e0dca29a240caa7533ff3981393dcc40a2c105
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Reset clocks usb2_hs_phy_only and gcc_qusb2 are added for USB on MSM8909.
USB driver also requests for clock frequencies when active on snoc/pcnoc
and bimc.
Change-Id: Id7be052c944f7a01ef7bdaf45621f2bdde29e0c9
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Add support for the RPM clock controller for MSM8992. Also
add additional clocks needed by the RPM controller to the
clock list.
Change-Id: Ica6fd73426e7cb779d743c25ffad4d1b00b90b5a
Signed-off-by: Pushkar Joshi <pushkarj@codeaurora.org>
gcc_mss_cfg_ahb_clk is now controlled by RPM. Remove it from
clock-gcc-8994 and add mss_cfg_ahb_clk in clock-rpm-8994.
Change-Id: I03293fe4f9bf1d97e38999d38229c838e869fb7c
Signed-off-by: Junjie Wu <junjiew@codeaurora.org>
Setup DSI 1 PLL clock heirarchy. This is needed for instances
where we need to turn off the second pll in case of current
leak issue.
Change-Id: I694af1fa9591b2345709687c9e7b1d69f15b56a9
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
Bus scaling driver allows clients to make bandwidth requests between end
points. The bus topology allows bus scaling driver to honor these requests
by representing in software the device connections.
Change-Id: I281a58259e4a09eab49bc796975c17d36ad4192d
Signed-off-by: Girish Mahadevan <girishm@codeaurora.org>
Add support for rpm and gcc clocks according to the
hardware and software clock plan for msmferrum.
Change-Id: I6d4359773ceafc114985c593ae450fb06b7e14a7
Signed-off-by: Janani Venkataraman <jananiv@codeaurora.org>
BIMC measurement is more complicated on MSM8994 than previous targets.
Add BIMC KPSS and GFX measurement support.
Change-Id: Ia637470339a56a805b20a9042537918201a4d5c0
Signed-off-by: Junjie Wu <junjiew@codeaurora.org>
Until now the clock header file being used was the same across
MSM8994 and MSM8992. However, MSM8992 does not have some of the
clocks present on MSM8994. Hence, create a new MSM8992 specific
clock header file.
Change-Id: If03059647778050179e33ee9ad14e353ac1c3764
Signed-off-by: Pushkar Joshi <pushkarj@codeaurora.org>
Add the device tree support for FSM9010 RUMI platform.
Change-Id: I6a91a3d784e5ae4eb79bec809c632a69f7d89650
Acked-by: Kaushik Sikdar <ksikdar@qti.qualcomm.com>
Signed-off-by: Venkatesh Yadav Abbarapu <quicvenkat@codeaurora.org>
Add hash values for pcie_gpio_ldo gate clock to allow the
driver to use it.
Change-Id: I260a33c9d99682f886528f25c28d5c7bc23e58ee
Signed-off-by: Tianyi Gou <tgou@codeaurora.org>
Introduce rules engine module for adhoc driver. This module
allows creating rules based on client votes that can be used
to throttle certain master ports or to receive callbacks when
certain combinations of votes have been made.
Change-Id: I532eb42a9399514131dcda47440f966cfe732f76
Signed-off-by: Girish Mahadevan <girishm@codeaurora.org>
Add hash values for usb reset and gate clocks to allow the
driver to use them.
Change-Id: I2973737ac05ea17e36987f623da9dda4cfac7f88
Signed-off-by: Tianyi Gou <tgou@codeaurora.org>
new voteable tbu clocks gcc_cpp_tbu_clk and gcc_mdp_rt_tbu_clk added for
clients to vote.
Change-Id: Id97932d6dce21f9f077111de30d129294e5094ad
Signed-off-by: Taniya Das <tdas@codeaurora.org>
All BIMC related ports changed to an effective width
of 16 bytes.
Add usb2 slave node also.
Change-Id: I819b771573e82551a480073a80d35e03c22b78f0
Signed-off-by: Alok Chauhan <alokc@codeaurora.org>
Add the hash values for ln_bb_clk and cxo_dwc3_clk to
support the control of them through clock apis.
Change-Id: I7e939c3b84d99abb5329ef49c62189a6e577aa76
Signed-off-by: Tianyi Gou <tgou@codeaurora.org>
This file contains all the clocks supported on msmferrum.
Change-Id: I579f6de72aded04e093d2221e7a517a16fa9aee4
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Multiple drivers need to vote for CE clock rate. Add voters for them
to prevent drivers overwriting others' vote.
Also change current users to use the voter clock.
Change-Id: Idf1f67401d2d1c15ba13844669c87040b9713f8b
Signed-off-by: Junjie Wu <junjiew@codeaurora.org>
Add support for new 20nm PLL clock driver to handle
different DSI panel resolutions. Add seperate files
to support this new 20nm PHY PLL block.
Change-Id: I4ee5309449f317daddba7106cb8e1829fd6e76cf
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
Support dummy clock lookups for MSMZIRC through device tree. The list
of clocks are not final.
Change-Id: Ie20ed3d507adc3b5b5922e8cb77071fe913b8e3a
Signed-off-by: Tianyi Gou <tgou@codeaurora.org>
Clock framework now has support for orphan clocks, which means clocks
can register even if their parents are not available. Switch to new
implementation and remove clock MMSS MDSS driver. Display related
clocks will be registered together with other MMSS clocks. They will
be available once their parents are registered.
Change-Id: I962175cf7cdfd22058c2024decdefa7430ad643b
Signed-off-by: Junjie Wu <junjiew@codeaurora.org>
MSS needs to vote for GPLL0 before its output can reach MSS clock
controller. Model this vote bit as gate clock.
Change-Id: Ia13ed3847597ac757734cad9ff62a982c61ef91f
Signed-off-by: Junjie Wu <junjiew@codeaurora.org>
gpll0_misc source select value is now used for camss and usbfs rcg
muxes.
Change-Id: Iffb7e5798e32798072e1ae0a77642f92f522cb4e
Signed-off-by: Taniya Das <tdas@codeaurora.org>
A standalone reset was provided for USB3PHY_PHY_BCR. Associate it
with gcc_usb3_phy_pipe_clk instead to keep it consistent with other
targets.
Change-Id: I9fe5965f59e8dff1e30967ecd9872054d5a48c52
Signed-off-by: Junjie Wu <junjiew@codeaurora.org>
Add the necessary clocks and muxes to allow
measurement of the A53 and A57 cluster clocks.
Change-Id: Idacd2d042d96e8ebbf6e098057c684fd08c254ed
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
Model the DSI clocks in GCC as a separate device. The byte and pixel clocks
exposed by the DSI PLL device is needed by the GCC DSI clocks. Finally, the
DSI controller can get the clocks exposed by GCC DSI. So, the order of
probes for this to work is GCC->DSI PLL->GCC_MDSS_DSI->DSI controller.
Change-Id: Iee6f1f6db3e52d434d2066374b504a9dc6630e22
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Add oxili_rbbmtimer_clk and its root clock to clock-mmss-8994 driver.
Change-Id: I34f9e1ea179aeb8442967c142673491ec0d77681
Signed-off-by: Junjie Wu <junjiew@codeaurora.org>
USB driver needs gcc_qusb2_phy_reset to reset part of their HW.
Add support for gcc_qusb2_phy_reset.
Change-Id: I7cc468f90081ff28a8b921fb2179162822cb5c55
Signed-off-by: Junjie Wu <junjiew@codeaurora.org>
Add support for a53 clocks for big cluster and
little cluster and for cci clock.
Change-Id: I26e66f79b561c662e08db821ab30a39a112da241
Signed-off-by: Hanumath Prasad <hpprasad@codeaurora.org>
Introduce a driver that models the cluster and CCI
clock trees in the MSM8994, and provides clocks to
various drivers that decide the frequency of those
clocks.
Change-Id: I63da505d159bb2bb1cddbd8dfba747a07ea9fd27
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
A53(apss) uses the HFPLL as clock source for bigcluster
and SR2PLL as source for little cluster and
CCI to switch frequencies.
Change-Id: I62bb8c17b7381ef7d28f1d8e2728cede28d0dc5c
Signed-off-by: Hanumath Prasad <hpprasad@codeaurora.org>
Introduce bus topology for MSM8939. This is a representation
of the bus connections in the SOC and allows the bus driver
to setup bandwidth requests from clients for the paths desired.
Change-Id: If68dfb571efc0ece04c12256f7aa224e51507344
Signed-off-by: Girish Mahadevan <girishm@codeaurora.org>
8936 has only global clock controller, add support
for the same and the RPM clock controller.
Change-Id: I476823f9dd6bdf5d1d0c9a95e75de7fd58a9a897
Signed-off-by: Hanumath Prasad <hpprasad@codeaurora.org>
Low power mode and cpufreq drivers need to obtain
references to the CPU and CCI clocks. Add dummy
clocks to allow them to probe.
Change-Id: I11d4b7959b5abcf992bade9a18217fbfb51761e4
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
Introduce msm8994 as the official name for msmplutonium.
Change-Id: I9e87c8c8356becb1841cf476c4c2bcfa2c5d58b2
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
Add MDSS clock driver. MDSS clocks consist of pixel and byte clocks for
display. They are part of MMSS clock controller on MSMPLUTONIUM.
Change-Id: Ifb8e6f1f83f367e1cc3d479433c793be5fbca251
Signed-off-by: Junjie Wu <junjiew@codeaurora.org>
Add the TCU nodes to the bus topology and correct the QoS related params
for the other nodes as this could result in system performance degradation.
Change-Id: I00751704cefc5c3c7b96309e2efb3faea15254ba
Signed-off-by: Girish Mahadevan <girishm@codeaurora.org>
Fix invalid paths in plutonium bus topology.
CRs-Fixed: 643839
Change-Id: Ia51d6a737c7bd43c620639f1179058e7a795240d
Signed-off-by: Dan Sneddon <dsneddon@codeaurora.org>
Introduces the bus topology for MSM-plutonium. Also moves
the client-ids to a file accessible by the device-tree.
Change-Id: I5deb33e867eb40ef90fecfb650109871edb4948d
Signed-off-by: Dan Sneddon <dsneddon@codeaurora.org>
gcc_debug_mux is part of debug clock controller, not global clock
controller. When GCC registers, the base pointer of gcc_debug_mux
might not be mapped yet. Remove it from msm_clocks_gcc_plutonium.
gcc_debug_mux is already correctly registered in debug controller.
Change-Id: If0d1c0ffc32e118677046f4664aa98fa31a33ef0
Signed-off-by: Junjie Wu <junjiew@codeaurora.org>
Support measurement for mmsscc_mmssnoc_ahb clock. Also external clocks
in MMSS into lookup table.
Change-Id: Ia6bfc61ea2dc7264c71ddbe33650f312fe755357
Signed-off-by: Junjie Wu <junjiew@codeaurora.org>
The GLB_CLK_DIAG register selects the test clock to be
output from the APCS to the chip's clock controller.
APSS debug mux will allow to measure the current cpu
and l2 frequency.
Change-Id: Ifa48719124e7abbdda2aaa36af60216502de75a8
Signed-off-by: Taniya Das <tdas@codeaurora.org>
GCC use XO clock to derive the correct rate of PLLs. cxo_gcc
used previously are dummy voter clocks that have a fixed rate
of 1000. This leads to wrong calculation of PLL rate.
Use the correct XO clock for GCC.
Change-Id: Ib03c27a6447016e349e08c40f4e379c8fd26d69a
Signed-off-by: Taniya Das <tdas@codeaurora.org>
gcc_boot_rom_ahb_clk is used by drivers on MSMPLUTONIUM. Add support
for this clock.
Change-Id: I66606ff40298c802be2ea01d81549b311fb71bc5
Signed-off-by: Junjie Wu <junjiew@codeaurora.org>
Register the clock-krait driver as the provider of the
krait clocks and introduce the of_index values for krait
clocks so that the clock clients can use the DT clock lookup
features.
Note that this change also provides the backward compatibility
for table based lookup.
Change-Id: I104385269d2d9b989171a9ea7722e3ba4293d09f
Signed-off-by: Tianyi Gou <tgou@codeaurora.org>
MMSS needs to vote enable one bit in GCC before GPLL0 signal is propagated
to MMSS clock controller. Model this bit as a gate clock.
Change-Id: Iff8a228655cb778e4cc880ce9693ac756d41dda0
Signed-off-by: Junjie Wu <junjiew@codeaurora.org>
This change adds the DSI PLL clock driver support for
8916. In addition, it adds support of DSI PLL programming
of different MDSS revisions using the same DSI PLL driver.
Also rename the compatibility string of the DSI
PLL handle so that the detection and support of DSI
PLL driver for 8974 and 8916 happens dynamically.
Change-Id: I169ebeaf23e4be8ff4b533fce1057144edd8b692
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
Add more clocks need on this platform, and remove ones that are
not needed or controlled by clock driver.
Change-Id: I7367d20927d9688aabed83675edbc6616d99728e
Signed-off-by: Junjie Wu <junjiew@codeaurora.org>
A53(apss) uses the SR2PLL as the source to
switch frequencies.
Change-Id: I5ba8c6516fd1066b2c6c7af3c7a06e7c069ddc7f
Signed-off-by: Taniya Das <tdas@codeaurora.org>
cleanup for 8916
- gpll1 frequency has changed.
- pronto gpll is not configure by Apps
- gfx frequency has modified.
WCSS debug support is added.
Change-Id: Ia1ec8bce56d975a31512a62d7725b01fd72d6471
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Linux Build Service Account