Use the correct power class field from the extended CSD register
for HS400 mode as defined in the eMMC5.0 specification.
CRs-fixed: 690341
Change-Id: Ie10e35941fd3c6ee49c686f721bf5af6fcd74862
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
Rather than using the streaming API, use the coherent allocator to
provide this memory, thereby eliminating cache flushing of it each
time we map and unmap it. This results in a 7.5% increase in
transfer speed with a UHS-1 card operating in 3.3v mode at a clock
of 49.5MHz.
CRs-fixed: 684185
Change-Id: I82aae6264db1ebfb87badbb223893b066ad53652
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tested-by: Markus Pargmann <mpa@pengutronix.de>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Chris Ball <chris@printf.net>
Git-commit: d1e49f77d7c7b75fdc022e1d46c1549bbc91c5b7
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
[venkatg@codeaurora.org: use adma_desc_sz for ADMA_SIZE & align_bytes - 1
for alignment check]
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
The actual resume takes place when a request is received. In a
situation when mmcqd and qseecomd(rpmb) both try to resume the
device, a race is ensued. This is because mmcqd first resumes
the device and then claims the host. Ideally, if resume is in
progress in one context the resume in the other context should
be cancelled.
Claim the host before resuming the device in mmcqd context.
CRs-fixed: 697018
Change-Id: I11d33e642a9b2022f77277196de128c9ac78d334
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
commit 5027251eced6e34315a52bd841279df957f627bb upstream.
a27fbf2f067b0cd ("mmc: add ignorance case for CMD13 CRC error") produced
a cmd.flags unhandled in realtek pci host driver. This will make MMC
card fail to initialize, this patch is used to handle the new cmd.flags
condition and MMC card can be used.
Signed-off-by: Micky Ching <micky_ching@realsil.com.cn>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Chris Ball <chris@printf.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The current vote applies to all CPUs and hence may have power
impact, especially when there are more number of CPUs. The new
IRQ specific QoS request shall update the vote only for one
CPU to which the IRQ's smp_affinity attribute is set to.
Change-Id: I55298f729949c39ebfa3eecd4746d77e40cb2e5c
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
With some bad SD cards, it is possible that the error recovery
procedure goes into a state where it retries the failed command
infinitely leading to CPU hog.
Fix inifinite retries when the bad SD card isn't responding to
a command even when the SD card reset mechanism is successful.
CRs-Fixed: 671153
Change-Id: Ic6db66b571aa425aec32c82d52789c68fe0cb0e9
Signed-off-by: Sujit Reddy Thumma <sthumma@codeaurora.org>
When handling a DISCARD operation, the MMC request data structure may be
freed in memory. Therefore, it can't be used to retrieve the cmd_flags
for checking if MMC_REQ_NOREINSERT_MASK is set:
(!(mq->mqrq_cur->req->cmd_flags & MMC_REQ_NOREINSERT_MASK)))).
To prevent the issue we should use the local variable of cmd_flags.
Change-Id: Idef53d5bd66fa6f1faaf79644c8efb5177c75e89
Signed-off-by: Maya Erez <merez@codeaurora.org>
Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
Program CORE_CSR_CDC_DELAY_CFG for hardware recommended 1.25ns delay.
We may see data CRC errors if it's programmed for any other delay
value.
CRs-Fixed: 683894
Change-Id: Id7de28b7b9222c35e6b419e416f72bd8f98cbaf8
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
The current timeout value is 30 sec and with this busy timeouts
are observed on few eMMC cards. Hence, increase it to 240 sec
which is already being used in IOCTL variant of sanitize command.
It helped resolve such busy timeout issues.
Change-Id: I08993ac9fb02520267b58bddee51f9c166f129ff
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
In HS400 mode, command line is still operated in SDR mode and not
DDR mode like data lines. So in order to correctly process command
responses, the hardware needs to be set appropriately or else there
will command crc or similar errors due to incorrect sampling of the
response.
Change-Id: I426ff4fc4798afae254d11a608c800dc0b7bf765
Signed-off-by: Krishna Konda <kkonda@codeaurora.org>
The newer msm sdhci's cores use a different DLL hardware for HS400.
Update the configuration and calibration of the newer DLL block.
The HS400 DLL block used previously is CDC LP 533 and requires
programming multiple registers and waiting for configuration to
complete and then enable it. It has about 18 register writes and
two register reads.
The newer HS400 DLL block is SDC4 DLL and requires two register
writes for configuration and one register read to confirm that it
is initialized. There is an additional register write to enable
the power save mode for SDC4 DLL block.
Change-Id: I20ddeaee9309c43cd51bebdfc02d70553c9d2a87
Signed-off-by: Krishna Konda <kkonda@codeaurora.org>
The only error returned by stop_request(), is returned when there is
no current request to stop. This case is handled by mmc_stop_request()
caller.
Change-Id: I09bb30593d6accefef5d550881d87b6bf603296c
Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
Enhance the error handling/recovery path during eMMC resume by
adding retry mechanism and by adding additional error messages
to failure cases. This may help some of the bad parts which fail
to resume sporadically.
Change-Id: I895068edb487e6a44205e0769342b2ec2c89c876
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
Fix a race condition that can lead to null pointer dereference
while the MMC transfers are going on.
1) mmc_request_done() -> mmc_wait_for_data_done ->
step1: update is_done_rcv
step2: wake_up sleeping thread (mmcqd) waiting for is_done_rcv
2) mmcqd -> mmc_wait_for_data_req_done
step4: wait for is_done_rcv or is_new_req
step5: is_new_req set from block layer context and mmcqd
is woken up
step6: let's say step1 is done, so complete the current request
step7: fetch new request and issue to host layer
step8: fetch one more request and wait for previous request to
complete
In the above execution contexts, if step4-step8 happens between step1 and
step2 a null pointer dereference is observed -
[ 29.483302] Unable to handle kernel NULL pointer dereference
at virtual address 00000488
[ 29.490366] pgd = c0004000
[ 29.493054] [00000488] *pgd=00000000
[ 29.518937] PC is at do_raw_spin_lock+0x8/0x13c
[ 29.523445] LR is at _raw_spin_lock_irqsave+0x20/0x28
[ 30.108789] [<c0339cd4>] (do_raw_spin_lock+0x8/0x13c) from
[ 30.118418] [<c095d178>] (_raw_spin_lock_irqsave+0x20/0x28) from
[ 30.127445] [<c0142ef4>] (__wake_up+0x20/0x50) from
[ 30.136124] [<c0663f70>] (mmc_request_done+0x30c/0x368) from
[ 30.145932] [<c067bd98>] (sdhci_tasklet_finish+0x130/0x13c) from
Change-Id: I9a21431b5fd9bb9bbcb5c18a9895096fe845e64b
Signed-off-by: Sujit Reddy Thumma <sthumma@codeaurora.org>
Fix race condition between mmcqd thread and the mmc_queue_suspend
updating a shared variable mq->flags, which can lead to potential
null pointer dereference as following-
Unable to handle kernel NULL pointer dereference at
virtual address 00000020
pgd = c0004000
[00000020] *pgd=00000000
mmcqd/0: 186] Internal error: Oops: 5 [#1] PREEMPT SMP ARM
CPU: 0 Tainted: G W (3.4.0-1251694-eng #1)
PC is at mmc_blk_err_check+0x20c/0x3b8
LR is at mmc_start_req+0x198/0x718
cpu0 | cpu1
x |= 1 | x |= 2
final value of x can be x = 1 or x = 2
Change-Id: Ie0fff6d6dba5aebb3584cba9fb98de24515c4cd8
Signed-off-by: Sujit Reddy Thumma <sthumma@codeaurora.org>
Set up the card detect GPIO in active configuration before
configuring it as an IRQ. Otherwise, it can be in some
weird/inconsistent state resulting in flood of interrupts.
Change-Id: I8f2344a72acbd48df745cc9b2602fe4ac6f034d4
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
The following two issues are addressed with this change -
1. The current code sets SDHCI_NEEDS_RETUNING flag even for tuning
commands and it will unecessarily cause tuning to be done again
for the next read/write command. Hence, we must not set this flag
for any CRC failures to tuning commands.
2. If SDHCI_NEEDS_RETUNING flag is set and if all tuning phases
pass, then the driver attempts to change the driver type by sending
CMD6 which is a not a tuning command. The driver will thus attempt
to do re-tuning again before sending CMD6 and goes forever in a
recursive loop. Hence, clear SDHCI_NEEDS_RETUNING flag before
executing tuning.
Change-Id: Iaf3b24b93fdf655392fe02c973799e465960a495
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
If the mmc_hw_reset() fails, then host->card might be NULL in some
cases. Hence, check for reset errors and report it to the caller so
that the current request can be aborted and also check for host->card
before accessing it so as to prevent NULL pointer dereference issue.
Change-Id: Iba0f0be314474e607a40383bc0b28eef66a31d63
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
This reverts and updates commit 77776fd0a4cc541b9 ("mmc: sd: fix the
maximum au_size for SD3.0"). The au_size for SD3.0 cannot be achieved
by a simple bit shift, so this needs to be implemented differently.
Also, don't print the warning in case of 0 since 'not defined' is
different from 'invalid'.
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Cc: stable <stable@vger.kernel.org> # [3.12, 3.13]
Signed-off-by: Chris Ball <chris@printf.net>
Git-commit: 9288cac05405a7da406097a44721aa4004609b4d
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Change-Id: Ia19e30f1b9d793e1757a3eb3126b994df6b7a72a
[stummala@codeaurora.org: resolved merge conflicts]
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
Since SD Physical Layer specification V3.0, AU_SIZE is supported up
to 0xf. So If SD-card is supported v3.0, then max_au should be 0xf.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
Git-commit: 77776fd0a4cc541b9a528eacc1d31ca47eb1ae7a
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Change-Id: I140ad257098ab88ae8fab0a9cdb28130c3d4327b
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
There could be a race between suspend and mmc_rescan as follows:
At resume:
-> mmc_pm_notify
-> mmc_rescan is scheduled
Suspend is triggered:
-> mmc_pm_notify
-> wait for mmc_rescan/cancel it
-> rescan acquires wakelock if card is detected
so as to give user-space a chance to respond
-> PM framework cancels suspend since wakelock is active
Hence, release the wake-lock if its active in suspend prepare
and check for rescan_disable before acquiring wake-lock.
This prefers suspend over notifying the user-space of the status
of the card, which is fine since with suspend user-space is frozen
too.
CRs-fixed: 655281
Change-Id: I83783589f9b541d3af73931e9a7b0b144a25538e
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
Enabling cache in micron devices with manufacturer ID 0xFE
is resulting in data corruption issues during power-off tests.
CRs-fixed: 654661
Change-Id: Ifcdecb26c4c75b055a128a8d9b883fc028521930
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
The intention of sdhci_msm_probe() was to wait up to 1ms for
CORE_SW_RST to be set, but only a 10us timeout was passed to
readl_poll_timeout().
Correct the timeout value to be 1ms, and decrease the sleep
time between read attempts to only 10us so that it's less
than the expected wait time of 40us.
Change-Id: I7007a68232bfba76409e2dbae3060622fa5c1913
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
Mmc thread is waiting for one of following events occurs:
- current running request completion (is_done_rcv)
- new request notification arrived (is_new_req)
- urgent request notification arrived (is_urgent)
or the thread received a signal. In this case none of described events
happened.
This change process the case, when mmc thread was unblocked from wait by
signal, for example system shutdown flow.
Change-Id: I0b4f0cefedc839640c162ad3cdb011d13daaee0c
Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
If the last access to eMMC before runtime/system suspend is an
RPMB access, the partition type within EXT_CSD[179] will be set
to RPMB. As per specification, the deselect CMD7 and sleep CMD5
are ignored by the card and are treated as illegal commands in
this state. This causes eMMC sleep command to timeout and thus
fails runtime/system suspend. Hence, switch to default partition
config before sending deselect CMD7 and sleep CMD5.
CRs-fixed: 630894
Change-Id: I40f3fb590aeba787de8ca3356a8eed5f2780bcc1
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
eMMC and SD card specifications restrict the usage of a class of
commands while commands in other class are in progress. For example,
during erase operations the SD/eMMC spec. allows only CMD35, CMD36,
CMD38. If clock scaling is enabled and decide to scale up the clocks
it may be possible that CMD19/21 tuning commands are sent in between
erase commands, which is illegal as per specification.
Fix such illegal transactions to the card and also make clock scaling
statistics accountable only for read/write commands instead of time
consuming commands, like CMD38 erase, where transactions are independent
of bus frequency.
Change-Id: Iffba175787837e7f95bde8970f19d0f0f9d7d67d
Signed-off-by: Sujit Reddy Thumma <sthumma@codeaurora.org>
This change prevents enabling cache during card init for specific
Kingstone card.
This change is workaround the problem of long timeouts for cache
operations.
Change-Id: I6be53a408c7d6422556585d4ea2f9b1c487563e0
Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
When data CRC errors occur during write transactions, mmc
block layer queries the card for successful writes. If the card
reports bytes requested as bytes successfully written, the mmc
block layer will end the request with blk_end_request(). If there
is a following async request pending for execution, the request
is thrown away while handling CRC errors leading to hang in
request queue. The hang is visible when user issues a sync()
system call.
The sequence of events are as follows -
mmcqd -> fetch a request -> send it to host driver -> fetch another
request -> wait for previous request to complete -> previous request
is in error -> skip sending current request to host driver and
do error handling for previous request in error.
During the last step, after error handling is completed the mmc
block layer does not requeue the current request which is skipped
and hence the request is infinitely stuck in the driver.
Change-Id: I9528fbe3ccb5b723fcd0793f86cca43906c4c29c
Signed-off-by: Sujit Reddy Thumma <sthumma@codeaurora.org>
Certain Kingston eMMC 4.41 cards might get broken when HPI feature.
This quirk will disable the HPI feature for such buggy cards.
There are features depending on HPI, the change will disable them:
- BKOPS support
- stop transmission flow
- CACHE_CTRL
Change-Id: Ie675f6cb0646c06458ac8eee9a38d12fbc485be5
Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
After removing the SD/MMC 'card' from the driver model we
are cancelling the pending clock scaling work which accesses
card->dev. This could cause NULL pointer issue as the card
is already removed.
CRs-Fixed: 640344
Change-Id: I8c5ee817e3f116dedf0bf4fb51eb6b70d52467b7
Signed-off-by: Pratibhasagar V <pratibha@codeaurora.org>
On fast path, waiting for 1ms interval to poll registers cause
performance degradation. Also having 1ms delays for polling with
interrupts disabled cause considerable system latencies, hence
poll at 1us interval.
Change-Id: I40113ccf56050b3c46604112846e9b37b254d2be
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
The status variable is being overwritten by label variable,
since the latter is an array of 0 length. Hence, move label
to be the last member of the structure.
CRs-fixed: 642326
Change-Id: If63d760427b729fe60731aad89144a600f2a2cb7
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
For controllers that doesn't support card insertion/removal i.e.,
when the quirk SDHCI_QUIRK_BROKEN_CARD_DETECTION is defined,
card_event() host op must not rely on present state register
to check the card's status.
CRs-fixed: 644221
Change-Id: Icff6db0d8fe17f01cf751896ae09aee215edc548
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
The commit 'e2598c - mmc: sdhci-msm: improve tuning process'
introduces NULL pointer dereference bug for SD 3.0 cards
when all the tuning phases pass. It uses mmc_card_mmc(card)
for checking the card type but card is initialized after
tuning is done for SD card and thus resulting in NULL
pointer dereference issue.
CRs-fixed: 640424
Change-Id: I59a8d5f017243d8391269bc98998bb37fc44f685
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
This is aimed to reduce the suspend time of sdhci-msm device.
The suspend of this device would be carried out in a separate
thread and other devices may suspend concurrently. This is
required since the mmc sub-system contributes to the major
chunk of suspend latency.
CRs-fixed: 634333
Change-Id: I7bdead2deacd96aec5201d82b143b07c470b3892
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
Enables the asynchronous suspend of card and class device.
This would enable both these devices to suspend in separate
respective threads, thus allowing other devices to suspend
concurrently.
CRs-fixed: 634333
Change-Id: Ic73022ef777b4fae4b1065f92cfa19da51a99634
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
The following commits have been reverted from this merge, as they are
known to introduce new bugs and are currently incompatible with our
audio implementation. Investigation of these commits is ongoing, and
they are expected to be brought in at a later time:
86e6de7 ALSA: compress: fix drain calls blocking other compress functions (v6)
16442d4 ALSA: compress: fix drain calls blocking other compress functions
This merge commit also includes a change in block, necessary for
compilation. Upstream has modified elevator_init_fn to prevent race
conditions, requring updates to row_init_queue and test_init_queue.
* commit 'v3.10.28': (1964 commits)
Linux 3.10.28
ARM: 7938/1: OMAP4/highbank: Flush L2 cache before disabling
drm/i915: Don't grab crtc mutexes in intel_modeset_gem_init()
serial: amba-pl011: use port lock to guard control register access
mm: Make {,set}page_address() static inline if WANT_PAGE_VIRTUAL
md/raid5: Fix possible confusion when multiple write errors occur.
md/raid10: fix two bugs in handling of known-bad-blocks.
md/raid10: fix bug when raid10 recovery fails to recover a block.
md: fix problem when adding device to read-only array with bitmap.
drm/i915: fix DDI PLLs HW state readout code
nilfs2: fix segctor bug that causes file system corruption
thp: fix copy_page_rep GPF by testing is_huge_zero_pmd once only
ftrace/x86: Load ftrace_ops in parameter not the variable holding it
SELinux: Fix possible NULL pointer dereference in selinux_inode_permission()
writeback: Fix data corruption on NFS
hwmon: (coretemp) Fix truncated name of alarm attributes
vfs: In d_path don't call d_dname on a mount point
staging: comedi: adl_pci9111: fix incorrect irq passed to request_irq()
staging: comedi: addi_apci_1032: fix subdevice type/flags bug
mm/memory-failure.c: recheck PageHuge() after hugetlb page migrate successfully
GFS2: Increase i_writecount during gfs2_setattr_chown
perf/x86/amd/ibs: Fix waking up from S3 for AMD family 10h
perf scripting perl: Fix build error on Fedora 12
ARM: 7815/1: kexec: offline non panic CPUs on Kdump panic
Linux 3.10.27
sched: Guarantee new group-entities always have weight
sched: Fix hrtimer_cancel()/rq->lock deadlock
sched: Fix cfs_bandwidth misuse of hrtimer_expires_remaining
sched: Fix race on toggling cfs_bandwidth_used
x86, fpu, amd: Clear exceptions in AMD FXSAVE workaround
netfilter: nf_nat: fix access to uninitialized buffer in IRC NAT helper
SCSI: sd: Reduce buffer size for vpd request
intel_pstate: Add X86_FEATURE_APERFMPERF to cpu match parameters.
mac80211: move "bufferable MMPDU" check to fix AP mode scan
ACPI / Battery: Add a _BIX quirk for NEC LZ750/LS
ACPI / TPM: fix memory leak when walking ACPI namespace
mfd: rtsx_pcr: Disable interrupts before cancelling delayed works
clk: exynos5250: fix sysmmu_mfc{l,r} gate clocks
clk: samsung: exynos5250: Add CLK_IGNORE_UNUSED flag for the sysreg clock
clk: samsung: exynos4: Correct SRC_MFC register
clk: clk-divider: fix divisor > 255 bug
ahci: add PCI ID for Marvell 88SE9170 SATA controller
parisc: Ensure full cache coherency for kmap/kunmap
drm/nouveau/bios: make jump conditional
ARM: shmobile: mackerel: Fix coherent DMA mask
ARM: shmobile: armadillo: Fix coherent DMA mask
ARM: shmobile: kzm9g: Fix coherent DMA mask
ARM: dts: exynos5250: Fix MDMA0 clock number
ARM: fix "bad mode in ... handler" message for undefined instructions
ARM: fix footbridge clockevent device
net: Loosen constraints for recalculating checksum in skb_segment()
bridge: use spin_lock_bh() in br_multicast_set_hash_max
netpoll: Fix missing TXQ unlock and and OOPS.
net: llc: fix use after free in llc_ui_recvmsg
virtio-net: fix refill races during restore
virtio_net: don't leak memory or block when too many frags
virtio-net: make all RX paths handle errors consistently
virtio_net: fix error handling for mergeable buffers
vlan: Fix header ops passthru when doing TX VLAN offload.
net: rose: restore old recvmsg behavior
rds: prevent dereference of a NULL device
ipv6: always set the new created dst's from in ip6_rt_copy
net: fec: fix potential use after free
hamradio/yam: fix info leak in ioctl
drivers/net/hamradio: Integer overflow in hdlcdrv_ioctl()
net: inet_diag: zero out uninitialized idiag_{src,dst} fields
ip_gre: fix msg_name parsing for recvfrom/recvmsg
net: unix: allow bind to fail on mutex lock
ipv6: fix illegal mac_header comparison on 32bit
netvsc: don't flush peers notifying work during setting mtu
tg3: Initialize REG_BASE_ADDR at PCI config offset 120 to 0
net: unix: allow set_peek_off to fail
net: drop_monitor: fix the value of maxattr
ipv6: don't count addrconf generated routes against gc limit
packet: fix send path when running with proto == 0
virtio: delete napi structures from netdev before releasing memory
macvtap: signal truncated packets
tun: update file current position
macvtap: update file current position
macvtap: Do not double-count received packets
rds: prevent BUG_ON triggered on congestion update to loopback
net: do not pretend FRAGLIST support
IPv6: Fixed support for blackhole and prohibit routes
HID: Revert "Revert "HID: Fix logitech-dj: missing Unifying device issue""
gpio-rcar: R-Car GPIO IRQ share interrupt
clocksource: em_sti: Set cpu_possible_mask to fix SMP broadcast
irqchip: renesas-irqc: Fix irqc_probe error handling
Linux 3.10.26
sh: add EXPORT_SYMBOL(min_low_pfn) and EXPORT_SYMBOL(max_low_pfn) to sh_ksyms_32.c
ext4: fix bigalloc regression
arm64: Use Normal NonCacheable memory for writecombine
arm64: Do not flush the D-cache for anonymous pages
arm64: Avoid cache flushing in flush_dcache_page()
ARM: KVM: arch_timers: zero CNTVOFF upon return to host
ARM: hyp: initialize CNTVOFF to zero
clocksource: arch_timer: use virtual counters
arm64: Remove unused cpu_name ascii in arch/arm64/mm/proc.S
arm64: dts: Reserve the memory used for secondary CPU release address
arm64: check for number of arguments in syscall_get/set_arguments()
arm64: fix possible invalid FPSIMD initialization state
...
Change-Id: Ia0e5d71b536ab49ec3a1179d59238c05bdd03106
Signed-off-by: Ian Maund <imaund@codeaurora.org>
As of now we ignore CRC/INDEX command failures to tuning command
and still wait for data from card but in case the card did not
receive the command, it won't send the data. This is causing
software request timeout for tuning commands. Hence, software
must not ignore such cmd errors for tuning commands but end the
request immediately after resetting the controller for both CMD
and DATA. Also, wait for 146 MCLK cycles for card to send out the
data and thus to move to transfer state. Its corresponding phase must
also be considered as bad phase.
CRs-fixed: 625855
Change-Id: Ic8462dd9c67e4f18a3ce73d972591772be8c6d10
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
Moves bus scaling code to architecture independant directory
for platform drivers.
Change-Id: Ie0d5b104882d1534fae262af85e99cc09a56ab04
Signed-off-by: Dan Sneddon <dsneddon@codeaurora.org>
Fix possible NULL pointer dereference within cd-gpio IRQ
handler mmc_gpio_cd_irqt(), which can potentially happen
if the card detect IRQ gets triggered before host->ops
are initialized.
CRs-fixed: 628836
Change-Id: I2f47717d338c5c7f8e7a994c28bb5c30b30286c6
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
When ADMA is disabled the max segments and max req size were not set
properly, set them right to use the driver in PIO mode.
Change-Id: I754c30c017062540335f96480d103f054cc38084
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
Commit 6932a01cd (mmc: card: quirk: disable cache for Hynix card)
claims to disable cache because of data corruption issues when cache
it is enabled. In reality, the patch allows enabling of cache during
card initialization but disallow flushing of cache during suspend or
file system sync operations. This is more dangerous than without
the commit. Move the fixups for disabling cache to mmc_fixups so as
to enable the quirk during initialization itself. Also, remove obvious
warnings everytime card is initialized during runtime resume.
Change-Id: I3f71eaccf90ffdea83f418b7c05be68f5d89d227
Signed-off-by: Sujit Reddy Thumma <sthumma@codeaurora.org>
In newer hardware, the tuning process is not able to always
find a reliable phase to use for sampling data. This is mostly
due to hardware. This problem manifests itself as all successful
tuning phases, which means that the phase choosen could be a bad
one but is not identified as such at the time of tuning. So in
order to work around this, rely on optional drive types implemented
by the eMMC card, in addition to the mandatory drive type (50 ohm).
By using drive types supported by the card, when all phases are
sucessful in tuning, change drive type to a different value in the
list of supported drive types and retune. This will continue for all
tuning phases until a valid one is found. After that the drive type
is reset to the default one, if changed.
Change-Id: I348fb30daa43d97c58f83f7e4a22019f94ef4954
Signed-off-by: Krishna Konda <kkonda@codeaurora.org>
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
Get the various drive types other than the default supported
by the card.
Change-Id: I122971e4fb4a3ab98f0078ceafca3380e9c0e2d1
Signed-off-by: Krishna Konda <kkonda@codeaurora.org>
This is needed for supporting 64-bit kernel.
Change-Id: Id4f60dc15688a6f02f31d77705ad1ef0181a1ce9
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
In the current code, if sdhci_check_state returns true a tasklet is
scheduled which doesn't complete the request if host->mrq is NULL,
which is the case, if sdhci is in bad state. This would make the
mmcqd thread wait for completion infinitely.
Hence, complete the request if sdhci_check_state returns true instead
of scheduling the tasklet.
CRs-Fixed: 615537
Change-Id: I8e2950c3999ac3806f9d631c52d86f0dc13b992f
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
Fix the following compilation issue when CONFIG_PM_SLEEP is defined and
CONFIG_PM_RUNTIME is not defined -
error: implicit declaration of function 'sdhci_msm_runtime_suspend'
[-Werror=implicit-function-declaration]
return sdhci_msm_runtime_suspend(dev);
^
error: implicit declaration of function 'sdhci_msm_runtime_resume'
[-Werror=implicit-function-declaration]
return sdhci_msm_runtime_resume(dev);
^
cc1: some warnings being treated as errors
make[5]: *** [drivers/mmc/host/sdhci-msm.o] Error 1
Change-Id: Id720f595746888c81c07426aab0c850cbaeccf0c
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
In some cases, it is possible that the hardware might trigger
an interrupt just about the same time the software tries to
reset the controller. In such case, the hardware interrupt will
be handled after the current thread release spin lock. This leads
to spurious interrupt handling after the completion of reset.
Change-Id: I75211adee1179b0636a918f5ceb68a072ad02a6c
Signed-off-by: Sujit Reddy Thumma <sthumma@codeaurora.org>
commit 66b512eda74d59b17eac04c4da1b38d82059e6c9 upstream.
With some SDIO devices, timeout errors can happen when reading data.
To solve this issue, the DMA transfer has to be activated before sending
the command to the device. This order is incorrect in PDC mode. So we
have to take care if we are using DMA or PDC to know when to send the
MMC command.
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit f662ae48ae67dfd42739e65750274fe8de46240a upstream.
Under function mmc_blk_issue_rq, after an MMC discard operation,
the MMC request data structure may be freed in memory. Later in
the same function, the check of req->cmd_flags & MMC_REQ_SPECIAL_MASK
is dangerous and invalid. It causes the MMC host not to be released
when it should.
This patch fixes the issue by marking the special request down before
the discard/flush operation.
Reported by: Harold (SoonYeal) Yang <haroldsy@broadcom.com>
Signed-off-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Seungwon Jeon <tgih.jun@samsung.com>
Acked-by: Seungwon Jeon <tgih.jun@samsung.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
mmc block data can be NULL. Hence, check for NULL before
dereferencing md.
CRs-Fixed: 562259
Change-Id: I0182c216ec73347cdd2ea464f593839fffd242a9
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
Merge the second phase of support needed for the 8916
target into msm-3.10. This includes a couple hundred upstream
patches for ARM64 support, as well as 8916 specific driver
development.
* origin/tmp-branch: (211 commits)
ARM: dts: msmplutonium: Update the cpu release address
Revert "arm64: Fix memory shareability attribute for ioremap_wc/cache"
clocksource: arch_timer: Do not register arch_sys_counter twice
xtensa: adjust boot parameters address when INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX is selected
sched_clock: Add support for >32 bit sched_clock
sched_clock: Use an hrtimer instead of timer
sched_clock: Use seqcount instead of rolling our own
clocksource: Extract max nsec calculation into separate function
ARM: sched_clock: Load cycle count after epoch stabilizes
sched_clock: Make ARM's sched_clock generic for all architectures
of: move of_get_cpu_node implementation to DT core library
of: introduce common FDT machine related functions
of: Introduce common early_init_dt_scan
mm: allow pgtable_page_ctor() to fail
of: only include prom.h on sparc
mm: introduce helper function mem_init_print_info() to simplify mem_init()
mm: use a dedicated lock to protect totalram_pages and zone->managed_pages
KVM: Move gfn_to_index to x86 specific code
ARM: KVM: move GIC/timer code to a common location
arm64: mm: Fix PMD_SECT_PROT_NONE definition
...
Conflicts:
arch/arm/mach-msm/board-8226.c
arch/arm/mach-msm/board-8610.c
arch/arm64/kernel/asm-offsets.c
arch/arm64/kernel/fpsimd.c
arch/arm64/kernel/setup.c
Change-Id: I289996bc18d8a2782906e7db1171b48e3ee46a73
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
After the last architecture switched to generic hard irqs the config
options HAVE_GENERIC_HARDIRQS & GENERIC_HARDIRQS and the related code
for !CONFIG_GENERIC_HARDIRQS can be removed.
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Git-commit: 0244ad004a54e39308d495fee0a2e637f8b5c317
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
[imaund@codeaurora.org: resolve merge conflicts]
Signed-off-by: Ian Maund <imaund@codeaurora.org>
In case of illegal buffer passed down by user, return -EFAULT instead
of count.
Change-Id: I2ce2ba5e8d26245fe828e8b6f102c218125bdf3b
Signed-off-by: Lee Susman <lsusman@codeaurora.org>
Merge support needed for the ARM64 8916 target into msm-3.10.
* origin/tmp-b7dbbd5: (289 commits)
arm: add pdev_archdata for dma_mask
thermal: tsens: fix compilation warning
msm: sps: remove sps header file
defconfig: arm64: msm: enable gpio sysfs reporting
arm64: Align CMA sizes to PAGE_SIZE
msm: ipa: add 64-bit support for IPA
defconfig: msm: Enable IPC Router and QMI kernel interface
msm: kgsl: Implement ioctl_rb_issueibcmds for compat
msm: rndis_ipa: add support for 64 bit
msm: ecm_ipa: add support for 64 bit
ARM: dts: msm: Add SPI clocks for QUP1 on plutonium.
ARM: dts: msm: Configure SPI on plutonium QUP1.
msm: ipa: set dma mask of IPA device
msm: ipa: add support for compat_ioctl
msm: ipa: move out of mach tree
arm: dts: msm8916: Change property for CMA regions
arm64: Change type of dma_{alloc,free}_from_contiguous
msm: kgsl: manage active count for perfcounter read compat ioctl
ion: msm: Add custom compat ioctl
ion: Add custom_compat_ioctl
...
Conflicts:
arch/arm/mach-msm/Kconfig
drivers/platform/msm/ipa/teth_bridge.c
Change-Id: I2e5ebfd104d72a91191fef6de33e107399c17938
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
If cpu-dma-latency is not defined in dts files, set it
to 200usec
Change-Id: I27b0357b4d88842a258332250bae66efac3ee5e2
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
Remove the sps header file from older location as sps
driver and clients need to use new header file from
new location include/linux.
Resolve the warnings/errors from client drivers due to
new sps header changes.
Change-Id: I1cdb87756abf3425a9bb5d8bf89cd1aa03a01716
Signed-off-by: Dipen Parmar <dipenp@codeaurora.org>
There is a new header file for 64bit platforms.
Change-Id: Iead9ccab1fd0b7249baf670e67872fcffeccf21d
Signed-off-by: Raviv Shvili <rshvili@codeaurora.org>
As a result of following fix: "mmc: core: do not reinsert prepeared
FUA and FLUSH requests in stop flow" REQ_FUA and REQ_FLUSH requests
are not reinserted back into i/o scheduler, but instead started request
execution.
This change will prevent cleaning current request pointer for such
requests.
Change-Id: I25f8706954fb538be62182c87d5fb20354696b7a
CRs-fixed: 600127
Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
Add support for Linux pin control framework while also supporting
the older TLMM configuration for backward compatibility
CRs-Fixed: 568232
Change-Id: Ib6b8f41fd6ced9aa62c980d7e4a73469603cbc5b
Signed-off-by: Pratibhasagar V <pratibha@codeaurora.org>
This change prevents enabling cache during card init for Hynix cards.
This change is workaround the problem of Hynix cards behavior for
adb reboot flow, when as a result of power cycle with cache enabled,
ext4 journal get aborted, because of meta data corruption.
Change-Id: I3198c940a334c8e5fbc3e68e0fea638e76467a75
Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
With commit 0797e5f145 (mmc: core: Fixup signal voltage switch), voltage
switch sequence for UHS-I cards is broken if used with sdhci driver.
The commit expects the SD clock to be disabled when mmc_set_ios() is
issued but sdhci_do_set_ios() re-enables the SD clock for few cycles
after disabling which is a specification violation during voltage
switch sequence. This failure is observed only for a small group of
cards where they ultimately fall-back into high-speed mode even if
UHS-I modes are supported.
Change-Id: Ie275326627a84bfcd4352637a043296c01c175a6
Signed-off-by: Sujit Reddy Thumma <sthumma@codeaurora.org>
During card detection within mmc_rescan(), mmc_rpm_hold() will be called
on host->class_dev before initializing the card and shall be released
after card detection. During card detection, once the card device is
added, MMC block driver probe gets called and in case that probe fails
due to block read/write cmd error, then the block driver marks that card
as removed. Later when mmc_rpm_release() is called within mmc_rescan(),
the runtime suspend of host->class_dev will be invoked immediately. The
commands that are sent during runtime would fail with -ENOMEDIUM and if we
propagate the same to rpm framework, the runtime suspend/resume for this
device will never be invoked even if the card is detected fine later on
during subsequent removal and insertion. Hence, do not report this error to
upper layers.
Change-Id: I9e60e9fb4ebc3d267cedae14aa88021000311427
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
CLK_PWRSAVE bit in vendor specific register gates the output clock to
card automatically if there are no data/cmd operations.
According the SD3.0 voltage switch sequence the host should provide
clock to the card for atleast one millisecond before DAT[3:0] lines
are pulled high by the card. In this case if power save bit is enabled
it might auto-gate clocks even before the card completes voltage
switch sequence.
Fix this by disabling power save operation when the clocks are turned
off and enable only when clock rate is >400KHz i.e., end of initialization.
CRs-Fixed: 589992
Change-Id: If82d6d2e303b8d1189b76712e514f41fe6e2cf8b
Signed-off-by: Sujit Reddy Thumma <sthumma@codeaurora.org>
Ensure that MMC/SD card is runtime resumed while enabling or disabling
clock scaling from sysfs. This is needed because the tuning commands
might fail if the card is runtime suspended.
Change-Id: I03767a9ceda2c424f0ce939b8db309d7e81a71da
Signed-off-by: Sujit Reddy Thumma <sthumma@codeaurora.org>
In case if a removable card is hot-plugged when the card and host
are runtime suspended then the mmc_rescan() tries to detect the card
status and removes the bus_ops. During card removal the Linux device
model calls pm_runtime_remove() of the corresponding "card" device,
which not only marks the device as suspended but also notifies the
parent so that it can be suspended if there are no children that are
holding resume. In case if the runtime suspend work of host is scheduled
before bus_ops are marked NULL in mmc_rescan(), the runtime suspend
of host fails with -ENOMEDIUM error. This error makes runtime PM framework
to permanently mark the host device in error and further runtime PM
operations are disallowed even when the card is re-inserted.
CRs-Fixed: 593475
Change-Id: Ie5e09f05ef26098c561b0c64b3954962d9d4c039
Signed-off-by: Sujit Reddy Thumma <sthumma@codeaurora.org>
When mmc context has unblocked from waiting current request because of
urgent request notification coming from block layer, there is prepeared
request. In the case, when the request is REQ_FUA or REQ_FLUSH, the
flow should not reinsert it back to i/o scheduler (since according to
block layer logic flush requests with data should never enter elevator).
Instead this request starts immediately.
Change-Id: Ia78b56c6135dd1a8d75a98fd5b771a5035e5c360
Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
MPM hardware acts as an interrupt controller when the apps has gone
to deep sleep states where GIC (the apps main interrupt controller)
has power collapsed. The MPM monitors certain GIC and GPIO lines
while APPS is sleeping and wakesup the apps when a favourable
transition is seen on those monitored lines.
It is an interrupt controller hence move its header to include/irqchip.
Change-Id: I2599784dd91bba73b51ca197e8da69b9c56f78a5
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Initiate a DLL (delay locked loop) retune for the next command,
if the current command fails with a CRC error.
This may help to choose a different phase (delay) if the same
has changed over the elapsed period of time.
CRs-Fixed: 587985
Change-Id: I21f6a5dadb096dd38d41fcf2251fa50b03c8bbb4
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
Clock scaling feature would scale up/down the MMC interface clock
frequency based on the load on storage. During clock scale up in HS400
bus speed mode, SW is unncesserily doing the tuning even after HS400
switch is done. This change fixes this bug.
Change-Id: Ica39acc41b14095438a7ccf536c3c7e5792d9c41
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Remove maximum timeout for all cards, since this causes
a long resume time for SD cards. Now only Hynix cards would
have this maximum timeout and this would be decided at the core
layer.
Change-Id: I758f9e5ecf407aba371928a86c313cf69e3cda63
CRs-fixed: 587284
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
Add a quirk to increase the data-timeout value for Hynix eMMC
cards only. This value is fixed to a maximum of 4 seconds.
Change-Id: I4bca6cbc877b323b29a3f7f5923d0708c48adf2c
CRs-fixed: 587284
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
Architecutural changes in the ARM Linux kernel tree mandate the
eventual removal of the mach-* directories. Move the
mach/clk-provider and mach/clk header to include/linux/clk.
Change-Id: I495f8332bf5d0d09ccfb236c819dea2bacb13542
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
Signed-off-by: Junjie Wu <junjiew@codeaurora.org>
In low memory conditions at runtime, allocation of max_segs may
fail. Retry with a scaled down max_segs until allocation succeeds.
CRs-fixed: 583267
Change-Id: I072724afa44854dacc58654e6329531c1bb11120
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
With SDCC5 the capabilities register is not advertising the
8-bit capability feature (except for 8974 and 8084).
So add the software capabilities for 8-bit slot for rest of
the targets with SDCC5.
Change-Id: I288292f37d77507bf5aaa44bf156496b4df87234
Signed-off-by: Pratibhasagar V <pratibha@codeaurora.org>
Fix compilation issues when CONFIG_PM_SLEEP and CONFIG_PM_RUNTIME
is not defined in kernel.
Change-Id: I74b3f8d335388a0abde707f3e1c5d17f448ac866
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
commit c8760069627ad3b0dbbea170f0c4c58b16e18d3d upstream.
Current MMC driver doesn't handle generic error (bit19 of device
status) in write sequence. As a result, write data gets lost when
generic error occurs. For example, a generic error when updating a
filesystem management information causes a loss of write data and
corrupts the filesystem. In the worst case, the system will never
boot.
This patch includes the following functionality:
1. To enable error checking for the response of CMD12 and CMD13
in write command sequence
2. To retry write sequence when a generic error occurs
Messages are added for v2 to show what occurs.
Signed-off-by: KOBAYASHI Yoshitake <yoshitake.kobayashi@toshiba.co.jp>
Signed-off-by: Chris Ball <cjb@laptop.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Add trace events to capture mmc suspend-resume latencies.
This would be useful to capture latencies for variety
of MMC/SD cards and decide on best possible runtime PM timeout.
Usage -
cd /sys/kernel/debug
echo 1 > tracing/events/mmc/mmc_resume_host/enable
echo 1 > tracing/events/mmc/mmc_suspend_host/enable
cat tracing/trace_pipe
Change-Id: Ic3a73753d55985c1c663cf2972cbed320e0fcfc3
Signed-off-by: Sujit Reddy Thumma <sthumma@codeaurora.org>
Fix buffer overflow while caching the mmc ext_csd content.
Also, to avoid duplicate allocation keep the allocated ext_csd
till the card is removed.
CRs-Fixed: 583929
Change-Id: I5d69e37f6fd1f5249479d454c353be050df40b6d
Signed-off-by: Sujit Reddy Thumma <sthumma@codeaurora.org>
commit fbd986cd420d1deeabf1039ec4e74075a5639db5 upstream.
In some cases, a NULL pointer dereference happens because data is NULL when
STATE_END_REQUEST case is reached in atmci_tasklet_func.
Signed-off-by: Rodolfo Giometti <giometti@enneenne.com>
Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit c1fa3426aa5c782724c97394303d52228206eda4 upstream.
When a software timeout occurs, the transfer is not stopped. In DMA case,
it causes DMA channel to be stuck because the transfer is still active
causing following transfers to be queued but not computed.
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Reported-by: Alexander Morozov <etesial@gmail.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Use sentinels as the path terminator for device match table
in drivers msm_sdcc.c and sdhci-msm.c. Without this, of_dev_lookup()
may run off the end of the array looking for bogus data.
CRs-Fixed: 582113
Change-Id: I069d3e058cea9f1bf74d48e7f7e83465ca981017
Signed-off-by: Sujit Reddy Thumma <sthumma@codeaurora.org>
With SDCC5 the capabilities register is not advertising the
3.0 voltage features (except for 8974 and 8084).
So add the software capabilities for voltage initialization
for rest of the targets with SDCC5.
CRs-Fixed: 568227
Change-Id: Ida53f5ad7249cd0cd8428b4839dfd932b04e31fa
Signed-off-by: Pratibhasagar V <pratibha@codeaurora.org>
The SDHCI host control2 register offset is 0x3E which is not
word aligned and is only 16 bits wide. But we use readl/writel
to read/write to it. Use readw/writew to avoid any alignment
issues.
Change-Id: Ibaa87ce46f2a2dd97f9e1c7979adb38e426acd5b
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
A callback to turn-on the controller clocks is implemented.
This callback would ensure that the pclk and mclk are enabled
but the output clock to the card is disabled.
CRs-Fixed: 567658
Change-Id: Ic97e600a6388fb64f1267a097b201f31d114a1fb
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
Signed-off-by: Sujit Reddy Thumma <sthumma@codeaurora.org>
Currently, the clock to the card is enabled prior to enabling
the power to card. Specification requires that the power be
supplied first and then a delay of 10ms and then clock be
provided to the card.
In this, during MMC_POWER_UP mode, the controller clocks would be
ON and the power would be supplied to the card. In the MMC_POWER_ON
mode, the clocks to the card would be enabled and the rate set.
A callback has been provided to facilitate the enabling of
controller clocks.
CRs-Fixed: 567658
Change-Id: I2d66eae1581b9b136faaba4cafc330aeb6a3f364
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
In mmc_block_test, the debug_fs based read function handlers write to an
arbitrary buffer which is given by any user. We add an access_ok check
to verify that the address pointed by *buffer is not in kernel space.
Only if the buffer is valid, do we continue the read handler.
Change-Id: I35fe9bb70df8de92cb4d3b15c851aa9131a0e8d9
Signed-off-by: Lee Susman <lsusman@codeaurora.org>
According to eMMC specification, there is no upper bound defined on
a flush request and the duration of flush operation is left to card
vendor's implementation. This means that it may take a very long
time to complete.
When eMMC cache is disabled, the card has to flush all the data in its
cache. So this means that for certain cards, the driver is not waiting
long enough for the flush to complete during cache disable operation,
leading to data on the card being corrupted.
This change increases the timeout for cache disable operation, thus
preventing data corruption.
CRs-Fixed: 562350
Change-Id: If68328ab56b50c7596800f07ef92c0ab16a55ec0
Signed-off-by: Maya Erez <merez@codeaurora.org>
Signed-off-by: David Ng <dave@codeaurora.org>
Signed-off-by: Krishna Konda <kkonda@codeaurora.org>
During secure discard, the sanitize operation is started
without any timeout value set, which result in a timeout
of 10 seconds applied at the SDHCi driver.
But since the sanitize operation was started after secure
discard was issued, it could take longer than 10 seconds.
So setting a timeout of 30 seconds based on testing done
so far.
CRs-Fixed: 567327
Change-Id: I27e3c9743ca17c151d478b8772649c366a2fd8f3
Signed-off-by: Krishna Konda <kkonda@codeaurora.org>
Update logging with:
- prefix with module name
- add '\n' in the end
- test_pr_* removed
Change-Id: I465c9809def9d294dcbb3f7cf7f474c189f5fdbf
Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
Several data-timeout issues were seen, most of which were
due to the card taking a longer time to respond. This patch
increases the timeout of the controller to 0xF i.e. max
possible.
Change-Id: I6739de3eb5d9cccf8e39d9dc4730056782334162
CRs-Fixed: 536832
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
In the MMC card debug_fs the read and write handlers use the strlcat
and sscanf, without checking the pointer given.
Since the pointer is not checked it is possible to write
everywhere (ring 0 or 3).
In order to fix it, an access_ok function is being used to verify
the buffer's pointer supplied by user is valid.
CRs-fixed: 545716
Change-Id: I13ca736337fefe29ff9b0df6a318e7d92240f8b2
Signed-off-by: Raviv Shvili <rshvili@codeaurora.org>
This patch enables the deferred resume support which would
prevent initialization of the card each time the system resumes.
With this change, the resume process would only be initiated if
a request is received.
Following scenario can occur:
1. device runtime suspended, system suspend is triggered
When resumed, the device would not be resumed until a
request is received.
2. device is runtime active, system suspend is triggered
When resumed, the device would be marked as BUS_NEEDS_RESUME
and actual resume would happen, when a request is received.
At this point, the device may also enter runtime-suspend or
system suspend may also occur. In both the cases, since the
device has not been resumed, it won't be suspended again.
However, the platform device would be runtime suspended
and resumed as before.
It can so happen that the card is removed even before a
request is received. In this case the device would be
resumed and card would be removed from core layer and
upper layers would be notified.
In case of SDIO cards, this change would not have any effect
since manual resume would be enabled for devices supporting
a block read/write commands.
CRs-Fixed: 561382
Change-Id: Id39befea109ee24864dfde0898395b972d0a1b3a
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
In case of any error within mmc_blk_alloc_req(), the bitmaps
that keep track of devices are not getting cleared. This may
result in failure to detect a card in case it reaches maximum
devices limitation. Fix it by clearing those bitmaps appropriately.
CRs-fixed: 563264
Change-Id: I0e23c45856355565534146f5fabb957fd4b1d007
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
Added checks to check if card is NULL before accessing it.
CRs-Fixed: 548450
Change-Id: Idc005b8420a78b3566164102fbeaa243a8e73c7c
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
This patch adds clock scaling support to HS400 cards.
Scaling down to 52MHz from HS400 involves:
- switching the bus-speed mode to HS at 52MHz
Scaling up to HS400 would require all of the initialization
process upto HS400 mode selection.
Change-Id: I8196d6666bcc0ef327659253df53a17792fa51f7
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
Signed-off-by: Krishna Konda <kkonda@codeaurora.org>
msmsdcc_request_end when called with interrupts disabled inside an
interrupt handler adds an unnecessary 5ms delay on command timeouts,
which impacts system performance. Remove this delay.
Change-Id: I90aec109fe84f7b9f9a9362b5ee2d8d1310833af
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
Defining this capability would invoke the suspend/resume
routines defined for mmc_host device by the PM framework.
CRs-Fixed: 490021
Change-Id: I6fde407ed91f0a7249923bb156482378e2bb727c
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
There is currently no mechanism to disable the runtime-pm
of eMMC/SD card. This patch adds the mechanism to disable
runtime-pm of eMMC/SD if MMC_CAP2_CORE_RUNTIME_PM is not
defined.
It sets the platform, class and card device as RPM_ACTIVE
irrespective of the capability but doesn't enable it.
The card is never runtime-suspended and hence the
corresponding mmc_host and platform device are not
runtime-suspended as well.
A capability MMC_CAP2_CORE_PM is used to select the use
of core power-management framework.
CRs-Fixed: 490021
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
Change-Id: I394a81a889ab7d4f0f0e6fe4b932630e30fc16c9
The SDCC5 controller and later revisions can handle reset in middle of
an ongoing transfer without the need to disable AHB bus transaction
separately. Disable the workaround for the newer revisions of the core.
Change-Id: I825bff8cccfc3084af9bbbf67a241bb73647872f
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
There are certain cases where the card detect gpio is not handled properly
when broken card detection quirk is used.
Currently the code enables polling irrespective of the presence of card
detect gpio when broken card detect quirk is enabled. Instead only enable
polling when the card detect gpio is missing along with the quirk.
Also when checking for the card detect status, check for the presence or
absence of a valid gpio before assuming that the card is always present.
Change-Id: I178b22031704ff102602271ae4ad16e30f14778f
Signed-off-by: Krishna Konda <kkonda@codeaurora.org>
In the MMC card debug_fs the read and write handlers use the strlcat
and sscanf, without checking the pointer given.
Since the pointer is not checked it is possible to write
everywhere (ring 0 or 3).
In order to fix it, an access_ok function is being used to verify
the buffer's pointer supplied by user is valid.
CRs-fixed: 545716
Change-Id: Ia710b6af5a95974fc930ca902e8ff18afa4e17ba
Signed-off-by: Raviv Shvili <rshvili@codeaurora.org>
When mmc_stop_request() has no request to stop, because underlying
host driver reported this, the flow should wait for the mmc done()
callback marking that urgent still pending.
CRs-Fixed: 538117
Change-Id: Ib684949619043882df69f4f1f9c45e28a67a5248
Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
There is race between sdhci_tasklet_finish()
and sdhci_stop_request(): when the request is finished before
stop flow called, error returned.
Change-Id: Iac43e6af2498bc75bc8cc959c680a92f9dd5ee7a
Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
commit f936f9b67b7f8c2eae01dd303a0e90bd777c4679 upstream.
I'm testing SH-Mobile SDHI driver in DMA mode with a new DMA controller using
'bonnie++' and getting DMA error after which the tmio_mmc_dma.c code falls back
to PIO but all commands time out after that. It turned out that the fallback
code calls tmio_mmc_enable_dma() with RX/TX channels already freed and pointers
to them cleared, so that the function bails out early instead of clearing the
DMA bit in the CTL_DMA_ENABLE register. The regression was introduced by commit
162f43e31c (mmc: tmio: fix a deadlock).
Moving tmio_mmc_enable_dma() calls to the top of the PIO fallback code in
tmio_mmc_start_dma_{rx|tx}() helps.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Chris Ball <cjb@laptop.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This reverts commit 1cb3485099.
This is a stable backport from a kernel before v3.10 so it
shouldn't be in 3.10 twice. Nothing is broken if we leave it
though because they're just duplicate entries.
Change-Id: If33c067fbcefbcd5a590ee579e0564c54ca792d6
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
On some eMMC cards cache flush is taking longer than 30 sec timeout
after HPI issued and -EIO reported to the upper layers. This may result
into journaling issues as flush calls are issued by the file system
joulrnaling code.
This change increases flush cache timeout to 90 sec, in case of timeout
occurs, after HPI issued, flush request re-queued to the block layer queue
to execute it later and keep journaling logic valid.
CRs-fixed: 545528
Change-Id: I1e968c07056062fd9c8e14e5bc3e62b3b4b99c64
Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
Up until now the FLUSH timeout error was not printed and there
was no way to know if the FLUSH completed successfully or not.
Printing the FLUSH failure will help to identify if FS corruption
happened due to this timeout.
Change-Id: I352423c84e2ca698284b90af5837ba96d03919bf
Signed-off-by: Maya Erez <merez@codeaurora.org>
Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
The SD cards functionality on QRD devices are failing
with CRC errors when used with higher clock / bus modes.
So reduce the clock speed for SD card slot.
CRs-Fixed: 491789
Change-Id: I24b8bfe44cee4367c22846747f439365d8795d2e
Signed-off-by: Pratibhasagar V <pratibha@codeaurora.org>
On machines that support more than 32-bit address via lpae or 64-bit buses
set the dma mask as 64-bit.
Change-Id: Ida88f3999fd5e7d09ebe73bb3481d3f1f4cf30c2
Signed-off-by: Krishna Konda <kkonda@codeaurora.org>
This change involves configuring the ADMA2 in 64-bit mode
based on the controller capabilities and setting up the
64-bit descriptor table so that driver can handle physical
addresses greater than 32-bits when LPAE is enabled.
Change-Id: I070d81212c180cbf23a041ff218106add513c47d
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
During probe disable the HC mode since the reset is done in
SDCC mode. HC mode will get set after the reset is complete
before the rest of the initialization is done.
Change-Id: I1fdc633c218447c15c8caad24e2805e7510088f2
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
The SD3.0 voltage switch sequence to 1.8v would involve stopping the
SDCLK before changing the voltage level and with recent changes in 3.10
kernel, the peripheral clocks are also getting disabled instead of
just stopping the clock to the card. This patch makes sure this doesn't
happen by marking the flag card_clock_off in struct mmc_host before
starting the voltage switch sequence and checking it in host controller
driver.
Change-Id: If62378ba1dd369e69524365a4421d57317c22ca2
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
This patch whitelists the AR6004 card for clock-gating.
The controller supports asynchronous interrupt functionality
which enables to receive interrupts from the card when clocks
are off. Hence, clocks can be turned off when idle.
This patch whitelists the card, to let the clock-gating
framework gate the clock during idle time.
Change-Id: I651f86e42595cc82f99093c06ee220a1d0ec95a9
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
This patch adds the sdio wakeup funtionality in either of the
two methods:
1. If a dedicated mpm interrupt is present in the particular
slot, it is configured to be used as wakeup.
2. If dedicated mpm interrupt is absent for a slot, then
DAT1 line gpio is configured as wakeup.
Change-Id: Ide54f807c12262429011e245de7dcecadcc60f3b
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
During voltage sequence (for UHS SD/SDIO cards), host first sends the
voltage switch command (CMD11) to card and then host must stop the clock
at least for 5ms but currently there is a possibility (if clkgate_delay
is 0) that clock may be gated off immediately after the CMD11 response
from card and then get turned on before 5ms itself. This patch ensures
that clock is gated off at least for 5ms after receiving the card
response for voltage switch command.
Change-Id: I131b3d154adab29bef367c8ce31c2f2edd159fd2
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
With commit 0797e5f145 (mmc: core: Fixup signal voltage switch), most of
the voltage switch sequence handling is moved to MMC core framework layer
and hence the role of host controller driver is left only to provide few
callbacks (one callback to change the voltage level and one more to let
the core layer know whether the card is puling down the data lines or
not).
This patch makes all the relevant changes to msm_sdcc host controller
driver to make it work with updated MMC core framework layer.
Change-Id: Ia1620ae351318cffbc58b03988ee815c66ed80df
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
The power save bit is currently enabled based on the clock
rate (clk_rate > 400KHz) within struct sdhci_msm_host. But this
clk_rate is updated with the latest value down in this function
sdhci_msm_set_clock(). So during runtime/system resume when the
card is still in initialization phase, the power save bit is
getting enabled when sdhci_msm_set_clock() is called for the
first time based on the previous rate which is wrong.
Change-Id: I05dc8a4a760f658935de3831aaf8dd3b2b996466
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
For several MoviNAND eMMC parts, there are known issues with secure
erase and secure trim. For these specific MoviNAND devices, we skip
these operations.
Specifically, there is a bug in the eMMC firmware that causes
unrecoverable corruption when the MMC is erased with MMC_CAP_ERASE
enabled.
References:
http://forum.xda-developers.com/showthread.php?t=1644364https://plus.google.com/111398485184813224730/posts/21pTYfTsCkB#111398485184813224730/posts/21pTYfTsCkB
Change-Id: I9946828b9c9063da312f95483fcc47e26585489a
Signed-off-by: Ian Chen <ian.cy.chen@samsung.com>
Reviewed-by: Namjae Jeon <linkinjeon@gmail.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Cc: stable <stable@vger.kernel.org> [3.0+]
Signed-off-by: Chris Ball <cjb@laptop.org>
Signed-off-by: Pratibhasagar V <pratibha@codeaurora.org>
Patch-mainline: v3.6
Git-commit: 3550ccdb9d
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Enable power save feature within controller by setting bit 1
in vendor specific register (0x10C). This allows controller to
disable SD clock when bus is idle to save power.
Change-Id: I916a5a414adb3f21dc3a75f3f86c3a81d6956dc8
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
This patch enables automatic calibration for eMMC devices
in using auto-command21. This feature is disabled by default
and can be enabled using the sysfs attribute
'enable_auto_cmd21'.
CRs-Fixed: 516314
Change-Id: I020c61cb9dee56c0ebe37864e67e4753ddee1adc
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
This patch adds Programmable Delay Line auto-calibration
support if supported by respective hosts.If the host
supports auto-calibration this change would enable
sending CMD19/CMD21 before any read operation.
CRs-Fixed: 516314
Change-Id: I8a0f51206dc0e174519dd71f0c75267a9e08e7f7
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
This patch checks the state of the device when schedule_suspend
fails and prints the error iff pm_runtime_error or pm_runtime is
disabled.
CRs-Fixed: 529879
Change-Id: I5800bc64cdcf5859260a7f24b9773355bef2f750
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
As per specification, auto cmd error status register is valid only
when auto cmd error bit is set in Error interrupt status register.
CRs-fixed: 515513
Change-Id: Id1013e1705d8efdba0171dcad14f783607d38ef3
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
Certain Hynix eMMC 4.41 cards might get broken when HPI feature is used
and hence this patch disables the HPI feature for such buggy cards.
As some of the other features like BKOPs/Cache/Sanitize are dependent on
HPI feature, those features would also get disabled if HPI is disabled.
Change-Id: I6a638ce089cbd977122e47aecb721bc3f0adf7b0
Signed-off-by: Pratibhasagar V <pratibha@codeaurora.org>
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
With the new 3.9 kernel there is a change in power up and set IO
voltage sequence due to which the driver waits for an interrupt
that never trigers. Similarly, for eMMC slot, power IRQ will not
be triggered when IO voltage is changed to 1.8V. As a temporary
workaround change the power up sequence and also change the core
layer driver to not issue set voltage request to 1.8V as eMMC will
anyways be set to 1.8V as part of power up by SDHCI driver.
Change-Id: Ibb7c48219b57693c9f3d26b062d18d6d4b6b8b71
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
This change needed because for urgent data transfer request is not
supported in upstream kernel.
This support includes following patches:
1. 9b0f5ecb226647953458edc10d049014575ce565
(mmc: Add support to handle Urgent data transfer request, 2013-04-15)
2. e9382e68cfca3c6b5dc128ef197d6c6fd201f9d4
(mmc: fix read latency of urgent request, 2013-04-15)
3. c96f40ad355a41d64febe29c10fb1c5d8d249499
(mmc: core: Fix updating clock scaling statistics, 2013-04-11)
4. 29b89ca5d0aa673cdf345eeb628ea070bac157ed
(mmc: sdhci: Add stop transmission support, 2013-04-15)
5. fa436d52cd2eac88d4b257c461c41c73bfae2092
(mmc: sdhci-msm: enable stop transmission support, 2013-04-17)
6. cceca8d24734926e7b5deb124adc1c2d6a6c41dd
(mmc: sdhci: Add stop transmission support, 2013-04-24)
Change-Id: I702fef0bdcb81d410199d2feeb775d6ec1fa15e6
Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
In HS400 mode a new RCLK is introduced on the interface for read data
transfers. The eMMC5.0 device transmits the read data to the host with
respect to rising and falling edges of RCLK. In order to ensure correct
operation of read data transfers in HS400 mode, the incoming RX data
needs to be sampled by delayed version of RCLK.
The CDCLP533 delay circuit shifts the RCLK by T/4. It needs to be
initialized, configured and enabled once during HS400 mode switch and
when operational voltage/clock is changed.
Change-Id: Ie7acc50cb932a7b531434ebe72f78e2e7ad27408
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
Venkat Gopalakrishnan